AJAT is using a Suss MicroTec FC150 flip chip bonder. It is automated device bonder for high precision application, development and production capabilities. The alignment accuracy of the bonder is ± 1µm. This bonder has a laser leveling feature which levels the two facing surfaces (chip and substrate) prior bonding (accuracy ± 1µm). This is essential feature when optical leveling cannot be used due to non-uniform surfaces or non-reflecting surfaces. Furthermore, the bonder also has underfill dispensing capability.

Summary of Bonding Specifications

Substrate Materials: CdTe, CdZnTe, Si, FR4, Glass
Minimum Pitch: 30µm
Alignment Accuracy: ± 1µm
Autoleveling of Chip and Substrate: Yes (Optical or Laser)
Bonding temperature: 100-230°C
Underfilling: Yes (Optional)

Reliability

The following table shows some test results of pull and shear tests of hybrids consisting of Si chips on Si substrate as well as Si chips on CdTe substrate. The bumps on the test chip were produced with the standard bumping process. No underfill or glop-top was used in any of the samples. It should be noted that dominant failure mechanism of these hybrids is the failure of pixel metallizations, not the solder bump itself or the solder joint. Therefore, these values only give an indication of the actual solder bump strength.

Test: Chip and Detector Material: Average Force (grams) per Bump:

Pull Test Si-Si 3,23
Shear Test Si-Si 2,63
Pull Si-CdTe 2,76
Shear-CdTe Si-CdTe 2,94

Bumping / Flip-chip bonding request form
Process flow chart

For further information about the bumping process or bumping/flip-chip assembly services, please contact Manager of Production: