Conventional indium or solder bump bonding techinique do not meet the requirements of state of the art x-ray and photo-counting device interconnections between the IC chips and CdTe or CdZnTe detectors. The devices require:

  • High density large array interconnections
  • Low process temperatures (Preferable below 180 °C. However, the re-melting temperature should be above 100°C)
  • Co-planary of chip and subtrate materials
  • Due to the EU directives lead-free materials are required in the near future.

In order to overcome these challenges, AJAT Oy has developed a low-cost, low temperature solder bumping process which is used in conjuction with high precision flip chip bonding. This process can by modified according to customer specification to meet the requirements of your products. The production of AJAT Oy takes place in a newly build cleamroom with some of the leading equipment in the field. The following images show chips which are bumped according to Ajat’s standard bumping process.

 

The standard bumping process of AJAT produces bumps with mean bump height of 34µm. However, the bumping process can be modified for bumps ranging from 10µm to 50µm. The melting temperature of the solder bumps can be modified by changing the alloying metals of the Sn-based solder as well as the composition of the solder alloy. Bismuth (Bi) and lead (Pb) are examples of some alloying metals used with tin (Sn) in our processes.

Summary of Bumping Specifications

Process: Single Sided / Wafer Level
Wafer Size: up to 200 mm/8”
Bump Composition: SnBi, SnPb
Bump Size: 10-50µm
Minimum Pitch: 30µm
Alignment Accuracy: ± 1µm

Bumping / Flip-chip bonding request form
Process flow chart

For further information about the bumping process or bumping/flip-chip assembly services, please contact Manager of Production.